If the ratio s/w condition is attained for a given temperature, the increasing bias voltage makes the system follow a supercritical Pitchfork bifurcation, which will provide two sta-ble nontrivial points (corresponding to the symmetrically located minima of the potential function) between the bias boundary valuesVpi0 and Vpiw (see figure 6-14). Following this Pitchfork bifurcation when the growing bias voltage reachesVpi0 the nondeformed position (x = 0) becomes unstable, and the oscillation of the beam takes place around the new nontrivial stable positions, as is proper of homoclinic structures.
6.3.1 Experimental bistability measurement
The change of the point around which the oscillation takes place produces a change of the coupling capacitance between the beam and the readout electrode which can be sensed by a network analyzer as a shift of the S21scattering parameter of the CMOS-MEMS system.
The network analyzer must be set up to provide a constant value of the excitation frequency, corresponding to a higher value than the natural frequency in each temperature because, otherwise, at some point in the process of increasing DC (and consequently decreasing the resonance frequency) the excitation frequency would be equal to the resonance frequency, placing the system in a dangerous condition of falling into pull-in collapse. In order to maximize the sensitivity of the experimental detection procedure, the configuration denom-inated as Setup#2 in figure 6-1 has been implemented; this setup allows the possibility of sensing the variation in the parasitic current produced by the oscillation around a nontriv-ial equilibrium point, besides the variation of the motional current due to the same reason.
Since the oscillation of the beam has small amplitude, in this case the parasitic component dominates over the motional component; moreover, from equation (6.1) it can be seen that a variation of the point around which the oscillation takes place has more influence on the parasitic component than on the motional component. The variation of the experimental S21 magnitude, depicted in figure 6-15a), implies the presence of the two-well potential distribution, and may be compared with the analytical pitchfork bifurcation expressed in terms of the normalized capacitance corresponding to the singular points of the potential function.
While the applied bias voltage is being increased, once the proper value has been reached
(Vpi0 < VDC < Vpiw), the experimental points may move towards both potential wells because of some slight asymmetries induced by theVD1 voltage. For instance, in figure 6-15a), the points with positive values are obtained withVD1 = 4V, while those with negative values correspond to VD1 = 2V. Those asymmetries produce the margin between the upper trajectory and the lower trajectory of the experimental data shown in figure 6-15a).
When the asymmetry produced by theVD1 voltage is performed with a time square signal, the snap-though motion is clearly observed in the time domain for biasing voltages higher thanVpi0. Figure 6-15b) shows the time history of the system transmission response (S21) experimentally measured (also, using Setup#2) with a network analyzer when the cc-beam resonator is excited by a squared signal at 4 Hz through theVD1node. Bistability is observed from the snap-through motion attained when the system exhibits two-well potential (for VMEMS= 203V in this case). This plot compares the variation of the position caused by the effect of the changing asymmetry when we are outside the bistable region (VMEMS = 160V) and when we are inside it (VMEMS = 203V): the variation of 2V of the asymmetry in the single potential well region provokes just a slight deformation, while in the bistable region generates a big variation. It is needed to note that the results of bistability, reported in figures 6-15a) and b) have been obtained under an operating temperature of 120◦C.
Specifically figures 6-15a) and b) correspond to experimental measurements of the resonator C4(16)-k15. Bistability has been also measured with metal resonators belonging to the Run 2017 set: figure 6-16 shows the experimental bifurcation to the bistable state of C3(8)-k17, under an operating temperature of 140◦C.
Numerical studies reported in section 5.5 indicate that the application of higher tem-perature increases the margin between Vpi0 and Vpiw for the same s/w ratio (see figure 5-8), and moreover the absolute values of these bias boundary values is decreased, moving the system away from the danger of pull-in collapse; thus the use of high temperatures is recommended.
Figure 6-14: Schematic representation of a) the supercritical Pitchfork bifurcation of the equilibrium points in the 2WP distribution and b) the nontrivial equilibrium deformations of the cc-beam resonator.
Figure 6-15: a) Experimental (from the Metal 4 resonator C4(16)-k15) and numerical Pitch-fork bifurcation. b) Experimental time history of the system transmission response inside and outside of the bistable regime.
Figure 6-16: Experimental (from the Metal 4 resonator C3(8)-k17) and numerical Pitchfork bifurcation.
6.3.2 Capacitive coupling analysis
The experimentally obtained coupling levels between the cc-beam resonator and the readout driver can be used to estimate the value of the offset capacitance Ck defined as the total capacitance contribution which does not depend on the beam deformation Ck = kFFCc. Given the small oscillation amplitudes, when using the Setup#2 for the measurement of the bistable behavior, the parasitic component of the capacitive current is far bigger than the motional component, which can be neglected, thus the capacitive current can be ap-proximated to
ic≈ −ωVACsin (ωt) kFF
0thl N
N
X
n=1
1
(s+Pnx) +Ck
!
(6.4) The transimpedance gain, whose value for each input frequency is known, can be expressed as
GTIA(ω) = Vo rms ic rms
(6.5) while the coupling level measured in the network analyzer is the relation between the system input and output signals in the form
S21= 20 log10
Vo rms VAC rms
. (6.6)
In this way, the transimpedance gain can be approximated to
GTIA(ω)≈ 10S2021
Considering the coupling levelS21 corresponding to the bias voltages that provides a single potential well and negligible displacement (x≈0), the offset component of the capacitance Ck can be estimated following equation (6.8). The values of this parameter, corresponding to several measured devices are shown in the last row of table 6.11 represented in figure 6-17.
All the estimated Ck values are of the same order of magnitude and, as has been pointed in section 6.2.4, their apparent disparity can be explained by the fabrication tolerances and uncertainty in the releasing process.
Ck≈ 10S2021
2πfexcGTIA(ω) −kFF0thl s
!
(6.8) The total experimental capacitance at zero displacement can be approximated with the expression
C0 exptl≈ 10S2021
2πfexcGTIA (6.9)
The comparison between the total experimental capacitance values at zero displacement (equation (6.9)) and the theoretical C0 values (equation (3.29)) is shown in table 6.11.
These estimation procedure can only be done if the the value of the transimpedance gain of the whole TIA amplifier is well known. However, in most of the effectuated experimental measurements of bistability, an additional capacitance have been added to theVc outoutput, with the aim of limit the gain of the amplifier and avoid the saturation of the output signal.
When this capacitance is added, the transimpedance gain is minor than the nominal of the UGBCA50 circuit (for the usual frequency ranges), but its exact value is unknown. The measurements of the devices listed in table 6.11 (and whose estimatedCkvalues are depicted in figure 6-17) have been effectuated without having added this additional capacitance to theVc outnode. In this way the value of the transimpedance gain of the whole TIA amplifier
is well known, and tabulated to depend on the frequency of the input signal.
Table 6.11: Comparison between the experimental and theoretical capacitive coupling level Chip15 C4 Chip16 C4 Chip17 C4 Chip59 C4
ExperimentalS21 11.2566 11.0981 10.0438 8.8711 ExperimentalC0 (F) 9.33e-16 9.16e-16 7.37e-16 6.44e-16 TheoreticalC0 (F) 2.32e-16 2.32e-16 2.32e-16 2.32e-16 EstimatedCk (F) 6.00e-16 5.83e-16 2.25e-16 3.13e-16
Figure 6-17: Estimation of the offset capacitance component Ck obtained from the low biasedS21 coupling level measurements.