CPU-Style SIMD Ray Traversal on GPUs

The heat views show the summed number of traversed nodes and primitive intersection tests for shadow rays of our algorithm (middle) and SATO (Surface Area Traversal Order)

In this paper we propose a very efficient pre-process to speed up the construction and traversal of sub-optimal, but fast-to-build hierarchies used for interactive ray tracing and

After this traversal opera- tion, the nodes masked for traversing push their children node to the traversal queue and the nodes masked for splatting are splatted to the

We present a novel BVH memory layout for incremental traver- sal that improves cache locality and compresses the child pointers, in order to effectively reduce the bandwidth.. To

Compared to a full precision BVH node pair (32 bytes), a node pair with 6-bit plane offsets compressed to 8 bytes brings a reduction of about 50% in node bandwidth when using

In addition, only keys of nodes whose references are not always stored in the most recently postponed node register need to be hashed: Keys are only hashed if their corresponding

In the remainder of the paper, packet tracing refers to structure-of-arrays (SoA) based SIMD shading of small (e.g., 8-wide) packets with single-ray traversal, and stream tracing

We notice that the latter technique is similar to the hierarchical 3D differential analyzer for voxel traversal (H3DDDA) offered by Museth [Mus14] on the CPU, whereby the H3DDDA