In any electrical power system, protection against faults is required in order to ensure reliable and safe system operation. This is also necessary for preventing damage to com-ponents and people. At the occurrence of a fault, a well-functioning protection scheme should be able to eliminate the fault, while limiting the impact on the healthy parts of the system. Two important steps in the elimination process are to detect and to locate the fault. These steps are, however, beyond the scope of this study. When the fault has been identified, the protection system must ensure fault interruption and isolate the faulted parts of the grid. The main emphasis of this section will be to present different methods for DC fault interruption, with a particular focus on DCCBs.
2.2.1 Three Methods for DC Fault Interruption
There are three main approaches to provide DC fault interruption, each relying on different devices: ACCBs, converters with fault-blocking capabilities, or DCCBs. The first strategy has been a common way to clear DC faults in point-to-point HVDC transmission systems based on voltage source converters (VSCs), and is based on utilizing the ACCBs of the AC/DC converters at each end [4, 23]. This is an economical and simple solution, but not
2.2 Fault Handling in MVDC Power Grids optimal for multi-terminal DC grids, as it is slow and leads to an outage of the whole grid [24]. In the second approach, power converters with inherent fault interruption capabilities are employed. This approach may be well-suited in certain application areas, as it can be space- and weight-efficient [25]. However, it is a costly and relatively slow method, and it involves grid deenergization, just as the ACCB approach [26, 27]. The third strategy is to install DCCBs at all line ends, which, as opposed to the two prior strategies, provides selective grid protection [26]. Using DCCBs for DC fault clearance is the main area of interest in this thesis, and is explored in more detail below.
2.2.2 Basic DCCB Operating Principles and Requirements
Developing CBs for DC fault clearance is not straightforward. DC fault interruption is a challenging task, imposing demanding requirements on the breaker design and operation.
These challenges, and the resulting DCCB operation principles required, are examined in the following by means of an illustrative example.
Figure 2.1 represents a simplified DC system experiencing a pole-to-pole SC fault.
The system consists of a constant DC voltage sourceVDC, a line inductanceLline, an ideal DCCB, and a resistive loadRload. vLandiLare, respectively, the voltage across and the current through the line inductance, whilevCBis the terminal voltage of the CB. Inspired by [28], the idealized waveforms in Figure 2.2 representiLandvCBduring the fault.
Figure 2.1:Simplified DC system experiencing an SC fault.
Figure 2.2:Fault current (red) and DCCB voltage (blue) during the SC fault in Figure 2.1.
The SC fault occurs at the time instantt0, at whichiLstarts to increase from its nominal valueInom. Att1,vCBrises above the nominal system voltage, the CB neutralizes the fault, andiLstarts to decrease from its peak valueIˆLtowards zero. The fault current reaches zero att2, at which the CB voltage drops to the nominal system voltageVDC.
One of the main reasons that DC fault interruption is a demanding task is the absence of natural current zero-crossings in DC systems. Thus, unlike ACCBs, DCCBs must be capable of forcing the fault current to zero. This is normally done by the DCCB generating a counter-voltage with an amplitude exceeding the source voltage. Hence, the voltage across the line inductance becomes negative, resulting in a negative time derivative of the line current, as deduced from Equation (2.1). Consequently, the line current will decrease to zero. This phenomenon can be observed in the time intervalt1–t2in Figure 2.2.
diL
dt = VDC−vCB
Lline
(2.1) According to Equation (2.1), there will be an overvoltage induced across the circuit breaker during the decrease of the fault current. This overvoltage is referred to as the transient interruption voltage (TIV) [29], and is shown asVTIV in Figure 2.2.VTIVcan be calculated by: The DCCB must have sufficient voltage withstand capability to handle the TIV. From Equation 2.2, it is evident that a largerVTIVvalue means a higher line current time deriva-tive, asVDCis constant. Consequently, an increase inVTIVwill result in the fault current decreasing more rapidly to zero. The downside is that this requires a larger voltage with-stand capability for the DCCB.
Another challenging aspect of DC fault interruption is the handling of the magnetic energy stored in the DC system during the fault. In AC systems, the stored energy drops to zero at each zero crossing of the current. Consequently, an AC system is demagnetized periodically [30]. This is not the case for a DC system, as it lacks current zeros. Unlike an ACCB, a DCCB must thus include means for energy dissipation. For the system in Figure 2.1, the CB must be able to absorb the total energyWtotalgiven by Equation (2.3) [29].
Wtotal= 1
2LlineIˆL+ Z t2
t1
VDCiL(t)dt (2.3) The first term on the right-hand side of Equation (2.3) is the magnetic energy stored in the line inductance during the fault. The second term is the energy fed into the network by the DC source during the fault current decrease betweent1andt2. Both energy contributions must be dissipated by the DCCB, leading to energy stress on the breaker [29].
The low network inductance of DC grids is also contributing to the complexity of DC fault interruption. Normally, DC network inductances are considerably lower than those of AC grids. This is mainly due to the lack of transformer leakage inductances and the lower DC line/cable inductances [5]. A low network inductance gives a high rising rate of the fault current duringt0–t1 in Figure 2.2. To prevent the current from reaching
2.3 Mechanical Switches