Analog correlators for CMOS signal processing

Dept.ofInformatics,UniversityofOslo

Cand.Scient.Thesis JohnArneNesheim February1993

Dept.ofInformatics,UniversityofOslo

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Preface

ThisisthethesisformyCand.Scient.degreeatDept.ofInformatics,Universityof Oslo.

ThetimeIhavespentwritingthisthesishasbeeninterestingandchallenging.Since mybackgroundismostlydigitalalotofthe\Analogwayofthinking"andtheanalog CMOStechniquewasnewtome.Theworkhasvariedfromdesigningthelayoutof thechiptotestingthefabricatedchipinourlaboratory.

IwouldliketothankmysupervisorTorSverreLandeandYngvarBergforallthehelp duringthewritingofthisthesis.MortenSalomonsenhasalsogivenalotofhints,both scienticandnon-scientic.FinallyIthankmyparents,theyhavealwaysencouraged meinmyeducation.

Blindern,February1993 JohnArneNesheim

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Contents

Preface v

Contents vii

Figures xi

Ananalogcalculator? xiii

1Introduction 1.1Digitalsystems 1.2WhatisanalogCMOS? 1.3Humansenses 1.4SomeprojectsusinganalogCMOS 1.5Aboutthisreport

1.5.1 Generalinformation1.5.2 Therestofthereport^{: :: ::: ::: ::: ::: :::: :::: :::::: :::::: :::::: :::::: :::::: :::::: ::::::: ::::::: ::::::: ::::::: ::::::: ::::::: ::::::: ::::::: ::::::: ::::::: ::::::: ::::::: ::::::: ::::::: ::::::: ::::::: ::::::: ::::::: ::::::: :::::::}

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2Background 2.1TheCMOStransistorinweakinversion 2.2Somebasiccircuits 2.3Circuitdeviations 2.4Basiccircuitsonmychip

2.1.1 TheCMOS-transistor2.1.2 Thesub-thresholdregion2.2.1 Currentmirroranddifferentialpair2.2.2 Thetransconductanceamplier2.3.1 GateefciencyandBodyeffect2.3.2 Earlyeffect2.3.3 Transistormismatch^{: :: ::: ::: ::: :::: :::::: :::::: ::::::: ::::::: ::::::: ::::::: ::::::::: ::::::::: ::::::::: ::::::::::: ::::::::::: ::::::::::: ::::::::::: ::::::::::: ::::::::::: ::::::::::: ::::::::::: ::::::::::: ::::::::::: ::::::::::: ::::::::::: ::::::::::: ::::::::::: ::::::::::: ::::::::::: :::::::::::} 101010

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viii Contents 3Signalprocessingandspectralanalysis 3.1Signalprocessing 3.2Spectralanalysis 3.3Correlation

3.2.1 Ashortreview3.2.2 TheFFT-algorithm^{: : : : ::: ::: :::: :::: :::: ::::: ::::: ::::: ::::: ::::: ::::: ::::: ::::: ::::: ::::: ::::: ::::: ::::: ::::: ::::: ::::: ::::: ::::: ::::: ::::: ::::: ::::: ::::: ::::: ::::: ::::: :::::}

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4Correlationandcorrelators 4.1Whatiscorrelation? 4.2Correlators 4.3Theasymmetricsimplecorrelator 4.4Thesymmetriccorrelator 4.5Othercorrelators 4.6Amajordrawback 4.7Theuseofcorrelatorsonmychip

4.1.1 Whatdoweneed?4.2.1 Circuitsolutions4.2.2 Aboutthelayout4.3.1 Description4.3.2 Simulationsandmeasuredresults4.4.1 Description4.4.2 Simulationsandmeasuredresults4.5.1 Theimprovedsymmetriccorrelator4.5.2 Correlator/anti-correlator^{: : : : :::: ::::: :::::: :::::::: :::::::: ::::::::: :::::::::: :::::::::: :::::::::: ::::::::::: ::::::::::: ::::::::::::: ::::::::::::: ::::::::::::: ::::::::::::::: :::::::::::::::: :::::::::::::::: :::::::::::::::: :::::::::::::::: :::::::::::::::: :::::::::::::::: :::::::::::::::: :::::::::::::::: :::::::::::::::: :::::::::::::::: :::::::::::::::: :::::::::::::::: :::::::::::::::: :::::::::::::::: :::::::::::::::: :::::::::::::::: ::::::::::::::::}

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5Thedevelopmentofachip:PASUC 5.1WhatisPASUC? 5.2ThePASUCchip 5.3Thedelayelement 5.4Thecorrelator 5.5TheWinnerTakeAllcircuit(WTA) 5.6ResistorsinCMOS 5.7Theselectcircuit 5.8Theshift-register

5.2.1 Asketchofthecircuit5.2.2 Somegeneralinformation5.3.1 Description5.3.2 Delaylines5.3.3 Simulationsandmeasuredresults5.3.4 Offsetinthedelayline5.4.1 Connections5.4.2 Auto-correlation5.4.3 Correlationandfrequency5.6.1 Hrespart5.6.2 Biaspart^{: :::: ::::::::: :::::::::::: :::::::::::: ::::::::::::: ::::::::::::: ::::::::::::: ::::::::::::: ::::::::::::::: ::::::::::::::: ::::::::::::::::: ::::::::::::::::: ::::::::::::::::: :::::::::::::::::: :::::::::::::::::: ::::::::::::::::::: ::::::::::::::::::: ::::::::::::::::::: ::::::::::::::::::: ::::::::::::::::::: ::::::::::::::::::: ::::::::::::::::::: ::::::::::::::::::: ::::::::::::::::::: ::::::::::::::::::: ::::::::::::::::::: ::::::::::::::::::: ::::::::::::::::::: ::::::::::::::::::: ::::::::::::::::::: ::::::::::::::::::: ::::::::::::::::::: :::::::::::::::::::}

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Contents ^ix 6Testingthechip 6.1Testingingeneral 6.2Beforetesting 6.3Testingthechip

6.3.1 Measuredresults^{: :: :: ::: ::: ::: :::: :::: :::: :::: :::: :::: :::: :::: :::: :::: :::: :::: :::: :::: :::: :::: :::: :::: :::: :::: :::: :::: :::: :::: :::: :::: :::: ::::}

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7Anothersystem:FREDD 7.1Anoverview 7.2Thechip 7.3HowdoesFREDDwork? 7.4Testingofthechip

7.2.1 Thedelayline7.2.2 ThecorrelatorandWTA7.2.3 Thefeedback^{: : : :: :: :: :: :::: ::::: ::::: ::::: :::::: :::::: :::::: ::::::: ::::::: ::::::: ::::::: ::::::: ::::::: ::::::: ::::::: ::::::: ::::::: ::::::: ::::::: ::::::: ::::::: ::::::: ::::::: ::::::: ::::::: ::::::: ::::::: ::::::: ::::::: ::::::: :::::::}

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8Problemsandimprovements 8.1ProblemswiththePASUCchip 8.2Improvingandexpandingthechip 8.3FREDD{problemsandpossibleimprovements 8.4Futurework

8.1.1 Theunscaleablecorrelator8.1.2 Thedampingproblem8.1.3 Whoisthewinner?8.3.1 Somesuggestions8.3.2 Anewversion^{: : : : : :: :: ::: :::: :::: ::::: ::::: ::::::: ::::::: ::::::: :::::::: :::::::: :::::::: :::::::: :::::::: :::::::: :::::::: :::::::: ::::::::: ::::::::: ::::::::: ::::::::: ::::::::: ::::::::: ::::::::: ::::::::: ::::::::: ::::::::: ::::::::: :::::::::}

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9Conclusion _9.1Thechip 9.2Experiences

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Bibliography 75

Appendix 79

ACompletecircuitdiagrams A.1PASUC:Theelementsinonestage A.2FREDD:Thechip

A.1.1CommentstotheupperpartofastageA.1.2CommentstothelowerpartofastageA.2.1CommentstotheInputs/OutputsA.2.2Commentstoasinglestage^{: : : : : : : : : :: :: ::: :::: :::: :::: :::::: :::::: :::::: :::::: :::::: :::::: :::::: :::::: :::::: :::::: :::::: :::::: :::::: :::::: :::::: ::::::}

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x Contents BToolsandinstruments _B.1Tools

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B.2Instruments

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